Motorola MPC8260 - Manual (Page 661)

MOTOROLA Chapter 23. SCC Transparent Mode 23-9
Part IV. Communications Processor Module
23.9 Transparent Mode and the PSMR
The protocol-speciÞc mode register (PSMR) is not used by the transparent controller
because all transparent mode selections are made in the GSMR. If only half of an SCC
(transmitter or receiver) is running the transparent protocol, the other half (receiver or
transmitter) can support another protocol. In such a case, use the PSMR for the non-
transparent protocol.
23.10 SCC Transparent Receive Buffer Descriptor
(RxBD)
The CPM reports information about the received data for each buffer using an RxBD,
closes the current buffer, generates a maskable interrupt, and starts receiving data into the
next buffer after one of the following occurs:
¥ An error is detected.
¥ A full receive buffer is detected.
¥ An ENTER HUNT MODE command is Issued.
¥ A CLOSE RXBD command is issued.
Table 23-7 describes RxBD status and control Þelds.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Offset + 0 E Ñ W I L F CM Ñ DE Ñ NO Ñ CR OV CD
Offset + 2 Data Length
Offset + 4 Rx Buffer Pointer
Offset + 6
Figure 23-2. SCC Transparent Receive Buffer Descriptor (RxBD)
Table 23-7. SCC Transparent RxBD Status and Control Field
Descriptions
Bits Name Description
0 E Empty.
0 The buffer is full or stopped receiving data because an error occurred. The core can read or write to
any Þelds of this RxBD. The CPM does not use this BD when RxBD[E] is zero.
1 The buffer is not full. This RxBD and buffer are owned by the CPM. Once E is set, the core should
not write any Þelds of this RxBD.
1 Ñ Reserved, should be cleared.
2 W Wrap (Þnal BD in table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CPM receives data into the Þrst BD that RBASE
points to. The number of BDs in this table is determined only by RxBD[W] and overall space
constraints of the dual-port RAM.