Motorola MPC8260 - Manual (Page 539)

MOTOROLA Chapter 18. SDMA Channels and IDMA Emulation 18-15
Part IV. Communications Processor Module
allocation and eliminates the need for core intervention between transfers. BDs contain
information describing the data block and special control options for the DMA operation
while transferring the data block.
18.8.1 Auto Buffer and Buffer Chaining
The core processor should initialize the IDMA BD table with the appropriate buffer
handling mode, source address, destination address, and block length. See Figure 18-7.
Figure 18-7. IDMAx ChannelÕs BD Table
Data associated with each IDMA channel is stored in buffers and each buffer is referenced
by a BD that uses a circular table structure in the dual-port RAM. Control options such as
interrupt and DONE assertion are also programmed on a per-buffer basis in each BD.
Data may be transferred in the two following modes:
¥ Auto buffer mode. The IDMA continuously transfers data to/from the location
programmed in the BD until a
STOP _ IDMA command is issued or DONE is asserted
externally.
¥ Buffer chaining mode. Data is transferred according to the Þrst BD parameters, then
the second BD and so forth. The Þrst BD is reused (if ready) until the BD with the
last bit set is reached. IDMA transfers stop and restarts when the BD table is
reinitialized and a
START _ IDMA command is issued.
IDMAx BD Base
Address (IBASE)
Source Device or
Buffer 0
Source Device or
Buffer 1
Source Device or
Buffer 2
Source Device or
Buffer n
BD 0
Destination Device or
Buffer 0
BD 1
BD 2
BD n
Destination Device or
Buffer 1
Destination Device or
Buffer 2
Destination Device or
Buffer n
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