Fcc hdlc receiving using rxbds -10 – Motorola MPC8260 User Manual
Page 912

31-10
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV. Communications Processor Module
Figure 31-4. FCC HDLC Receiving Using RxBDs
Buffer
0
0x0020
32-Bit Buffer Pointer
1
E
F
RxBD 0
Status
Length
Pointer
0
0x0023
32-Bit Buffer Pointer
0
E
F
RxBD 1
Status
Length
Pointer
0
0x0003
32-Bit Buffer Pointer
1
E
F
RxBD 2
Status
Length
Pointer
1
XXXX
32-Bit Buffer Pointer
E
RxBD 3
Status
Length
Pointer
Address 1
Address 2
Control Byte
Buffer
CRC Byte 1
CRC Byte 2
Buffer
Address 1
Address 2
Buffer
Control Byte
Empty
32 Bytes
32 Bytes
32 Bytes
32 Bytes
Two Frames
Received in HDLC
Unexpected Abort
Stored in Rx Buffer
Line Idle
Occurs before
Present
Time
Time
Stored in Rx Buffer
Buffer Full
Buffer Closed
When Closing Flag
Buffer
Still Empty
1
AB
29
Empty
MRBLR = 32 Bytes for this FCC
Empty
Last I-Field Byte
Information
(I-Field) Bytes
Received
Abort was
Received after
Control Byte
0
L
1
L
1
L
F
A
A
C
I
I
I CR CR F
Closing Flag
Abort/Idle
F
A
A
C
Legend:
F = Flag
A = Address Byte
C = Control Byte
I = Information Byte
CR = CRC Byte
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