Motorola MPC8260 - Manual (Page 568)

19-12 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Figure 19-7. SCC BD and Buffer Memory Structure
In all protocols, BDs can point to buffers in the internal dual-port RAM. However, because
dual-port RAM is used for descriptors, buffers are usually put in external RAM, especially
if they are large.
The CPM processes TxBDs straightforwardly; when the transmit side of an SCC is enabled,
the CPM starts with the Þrst BD in that SCC TxBD table. Once the CPM detects that the R
bit is set in the TxBD, it starts processing the buffer. The CPM detects that the BD is ready
when it polls the R bit or when the user writes to the TODR. After data from the BD is put
in the Tx FIFO, if necessary the CPM waits for the next descriptorÕs R bit to be set before
proceeding. Thus, the CPM does no look-ahead descriptor processing and does not skip
BDs that are not ready. When the CPM sees a BDÕs W bit (wrap) set, it returns to the start
of the BD table after this last BD of the table is processed. The CPM clears R (not ready)
after using a TxBD, which keeps it from being retransmitted before it is conÞrmed by the
core. However, some protocols support a continuous mode (CM), for which R is not cleared
(always ready).
The CPM uses RxBDs similarly. When data arrives, the CPM performs required processing
on the data and moves resultant data to the buffer pointed to by the Þrst BD; it continues
until the buffer is full or an event, such as an error or end-of-frame detection, occurs. The
buffer is then closed; subsequent data uses the next BD. If E = 0, the current buffer is not
empty and it reports a busy error. The CPM does not move from the current BD until E is
Status and Control
Buffer Length
Buffer Pointer
SCCx TxBD
Table Pointer
SCCx RxBD
Table Pointer
SCCx RxBD
Table
SCCx TxBD
Table
Dual-Port RAM
Status and Control
Buffer Length
Buffer Pointer
Tx Buffer
External Memory
Rx Buffer Descriptors
Tx Buffer Descriptors
Rx Buffer