Motorola MPC8260 - Manual (Page 435)

MOTOROLA Chapter 13. Communications Processor Module Overview 13-5
Part IV. Communications Processor Module
Figure 13-2 shows the CP block diagram.
Figure 13-2. Communications Processor (CP) Block Diagram
General-
Load/Store
Unit
Block Transfer
Dual-Port RAM
Microcode
DMA
Execution
Source Buses
Destination Bus
Address
Data
Address
Data
Address
Data
Peripherial Bus
Scheduler
Decoder
Instruction
To all units
Bus
Communications Processor (CP)
Timer
Special
Sequencer
Registers Unit
Data
Address
Data
Data
ROM Instruction
Address
Address
Data
Interface
Local Bus
60x Bus
Module
(BTM)
Purpose
Registers