Port b dedicated pin assignment (pparb = 1) -12, Table 35-6 sho ws the port b pin assignments – Motorola MPC8260 User Manual
Page 968
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35-12
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV. Communications Processor Module
Table 35-6 shows the port B pin assignments.
Table 35-6. Port B Dedicated Pin Assignment (PPARB = 1)
Pin
Pin Function
PSORB = 0
PSORB = 1
PDIRB = 1 (Output)
PDIRB = 0 (Input)
Default
Input
PDIRB = 1 (Output)
PDIRB = 0 (Input or
Inout if SpeciÞed)
Default
Input
PB31
FCC2: TX_ER
MII
FCC2: RxSOC
UTOPIA
GND
TDM_B2: L1TXD
Inout
GND
PB30
FCC2: TxSOC
UTOPIA
FCC2: RX_DV
MII
GND
TDM_B2: L1RXD
Inout
GND
PB29
FCC2: RxClav
UTOPIA slave
FCC2: RxClav
UTOPIA master
GND
FCC2: TX_EN
MII
TDM_B2: L1RSYNC
GND
PB28
FCC2: RTS
FCC2: RX_ER
MII
GND
SCC1: TXD
TDM_B2:
L1TSYNC/GRANT
GND
PB27
FCC2: TxD[0]
UTOPIA 8
FCC2: COL
MII
GND
TDM_C2: L1TXD
Inout
GND
PB26
FCC2: TxD[1]
UTOPIA 8
FCC2: CRS
MII
GND
TDM_C2: L1RXD
Inout
GND
PB25
FCC2: TxD[4]
UTOPIA 8
FCC2: TxD[3]
MII/HDLC/transp.
nibble
TDM_A1: L1TXD[3]
Nibble
TDM_C2:
L1TSYNC/GRANT
GND
PB24
FCC2: TxD[5]
UTOPIA 8
FCC2: TxD[2]
MII/HDLC/transp.
nibble
TDM_A1: L1RXD[3]
Nibble
GND
TDM_C2: L1RSYNC
GND
PB23
FCC2: TxD[6]
UTOPIA
FCC2: TxD[1]
MII/HDLC/transp.
nibble
TDM_A1: L1RXD[2]
Nibble
GND
TDM_D2: L1TXD
Inout
GND
PB22
FCC2: TxD[7]
UTOPIA
FCC2: TxD[0]
MII/HDLC/transp.
nibble
FCC2: TxD
HDLC/transp. serial
TDM_A1: L1RXD[1]
Nibble
GND
TDM_D2: L1RXD
Inout
GND
PB21
FCC2: RxD[7]
UTOPIA 8
FCC2: RxD[0]
MII/HDLC/transp. nibble
FCC2: RxD
HDLC/transp.. serial
GND
TDM_A1: L1TXD[2]
Nibble
TDM_D2:
L1TSYNC/GRANT
GND