Motorola MPC8260 - Manual (Page 182)

4-44 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part II. ConÞguration and Reset
Table 4-22 describes PITC Þelds.
4.3.3.3 Periodic Interrupt Timer Register (PITR)
The periodic interrupt timer register (PITR), shown in Figure 4-40, is a read-only register
that shows the current value in the periodic interrupt down counter. The PITR counter is not
affected by reads or writes to it.
Table 4-23 describes PITR Þelds.
4.4 SIU Pin Multiplexing
Some functions share pins. The actual pinout of the MPC8260 is shown in the hardware
speciÞcations. The control of the actual functionality used on a speciÞc pin is shown in
Table 4-22. PITC Field Descriptions
Bits Name Description
0Ð15 PITC Periodic interrupt timing count. Bits 0Ð15 are deÞned as the PITC, which contains the count for the
periodic timer. Setting PITC to 0xFFFF selects the maximum count period.
16Р31 С Reserved, should be cleared.
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field PIT
Reset 0000_0000_0000_0000
R/W Read Only
Addr 0x10248
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field Ñ
Reset 0000_0000_0000_0000
R/W Read Only
Addr 0x1024A
Figure 4-40. Periodic Interrupt Timer Register (PITR)
Table 4-23. PITR Field Descriptions
Bits Name Description
0Ð15 PITC Periodic interrupt timing count. Bits 0Ð15 are deÞned as the PIT. It contains the current count
remaining for the periodic timer. Writes have no effect on this Þeld.
16Р31 С Reserved, should be cleared.