Motorola MPC8260 - Manual (Page 480)

14-26 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
In the basic rate of IDL, data on three channels (B1, B2, and D) is transferred in a 20-bit
frame, providing a full-duplex bandwidth of 160 Kbps. The MPC8260 is an IDL slave
device that is clocked by the IDL bus master (physical layer device) and has separate
receive and transmit sections. Although the MPC8260 has eight TDMs, it can support only
four independent IDL buses (limited by the number of serials that support IDL) using
separate clocks and sync pulses. Figure 14-21 shows an application with two IDL buses.
Figure 14-21. Dual IDL Bus Application Example
14.6.1 IDL Interface Example
An example of the IDL application is the ISDN terminal adaptor shown in Figure 14-22. In
such an application, the IDL interface is used to connect the 2B+D channels between the
MPC8260, CODEC, and S/T transceiver. One of the MPC8260Õs SCCs is conÞgured to
HDLC mode to handle the D channel; another MPC8260Õs SCC is used to rate adapt the
terminal data stream over the Þrst B channel. That SCC is conÞgured for HDLC mode if
V.120 rate adoption is required. The second B channel is then routed to the CODEC as a
digital voice channel, if preferred. The SPI is used to send initialization commands and
periodically check status from the S/T transceiver. The SMC connected to the terminal is
conÞgured for UART.
MPC8260
S/T
S/T
U
U
S/T
S/T
IDL1
S/T
Interfaces
IDL2
ISDN TE NT
U
Interfaces