Motorola MPC8260 - Manual (Page 672)

24-4 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Ñ Number of retries per frame
Ñ Deferred frame indication
Ñ Late collision
¥ Receiver network management and diagnostics
Ñ CRC error indication
Ñ Nonoctet alignment error
Ñ Frame too short
Ñ Frame too long
Ñ Overrun
Ñ Busy (out of buffers)
¥ Error counters
Ñ Discarded frames (out of buffers or overrun occurred)
Ñ CRC errors
Ñ Alignment errors
¥ Internal and external loopback mode
24.3 Connecting the MPC8260 to Ethernet
The basic interface to the external SIA chip consists of the following Ethernet signals:
¥ Receive clock (RCLK)Ña CLKx signal routed through the bank of clocks on the
MPC8260.
¥ Transmit clock (TCLK)Ña CLKx signal routed through the bank of clocks on the
MPC8260. Note that RCLK and TCLK should not be connected to the same CLKx
since the SIA provides separate transmit and receive clock signals.
¥ Transmit data (TXD)Ñthe MPC8260 TXD signal.
¥ Receive data (RXD)Ñthe MPC8260 RXD signal.
The following signals take on different functionality when the SCC is in Ethernet mode:
¥ Transmit enable (TENA)ÑRTS becomes TENA. The polarity of TENA is active
high, whereas the polarity of RTS is active low.
¥ Receive enable (RENA)ÑCD becomes RENA.
¥ Collision (CLSN)ÑCTS becomes CLSN. The carrier sense signal is referenced in
Ethernet descriptions because it indicates when the LAN is in use. Carrier sense is
deÞned as the logical OR of RENA and CLSN.
Figure 24-3 shows the basic components and signals required to make an Ethernet
connection between the MPC8260 and EEST.