Motorola MPC8260 - Manual (Page 481)

MOTOROLA Chapter 14. Serial Interface with Time-Slot Assigner 14-27
Part IV. Communications Processor Module
Figure 14-22. IDL Terminal Adaptor
The MPC8260 can identify and support each IDL channel or can output strobe lines for
interfacing devices that do not support the IDL bus. The IDL signals for each transmit and
receive channel are described in Table 14-9.
Table 14-9. IDL Signal Descriptions
Signal Description
L1RCLKx IDL clock; input to the MPC8260.
L1RSYNCx IDL sync signal; input to the MPC8260. This signal indicates that the clock periods following the pulse
designate the IDL frame.
L1RXDx IDL receive data; input to the MPC8260. Valid only for the bits supported by the IDL; ignored for any
other signals present.
L1TXDx IDL transmit data; output from the MPC8260. Valid only for the bits that are supported by the IDL;
otherwise, three-stated.
L1RQx IDL request permission to transmit on the D channel; output from the MPC8260 on the L1RQx pin.
L1GRx IDL grant permission to transmit on the D Channel; input to the MPC8260 on the L1TSYNCx pin.
Note: x = a, b, c, and d for TDMa, TDMb, TDMc, and TDMd (for SI1 and SI2).
TSA
SCC1
Ethernet
Ethernet
PHY
LAN
ASYNC
PCM
CODEC/Filter
Monocircuit
S/T
Transceiver
SPI
ICL
(Control)
B1+B2+D
IDL
(Data)
B2+D
B1
MPC8260
System Bus (ROM and RAM)
SMC1
POTS
4 wire
SCC2
SMC2
SCC3