Motorola MPC8260 - Manual (Page 581)

MOTOROLA Chapter 19. Serial Communications Controllers (SCCs) 19-25
Part IV. Communications Processor Module
Figure 19-15. DPLL Encoding Examples
If the DPLL is not needed, NRZ or NRZI codings can be selected in GSMR_L[RENC,
TENC]. Coding deÞnitions are shown in Table 19-9.
Table 19-9. DPLL Codings
Coding Description
NRZ A one is represented by a high level for the duration of the bit and a zero is represented by a low level.
NRZI Mark A one is represented by no transition at all. A zero is represented by a transition at the beginning of the
bit (the level present in the preceding bit is reversed).
NRZI Space A one is represented by a transition at the beginning of the bit (the level present in the preceding bit is
reversed). A zero is represented by no transition at all.
FM0 A one is represented by a transition only at the beginning of the bit. A zero is represented by a transition
at the beginning of the bit and another transition at the center of the bit.
FM1 A one is represented by a transition at the beginning of the bit and another transition at the center of the
bit. A zero is represented by a transition only at the beginning of the bit.
Manchester A one is represented by a high-to-low transition at the center of the bit. A zero is represented by a low to
high transition at the center of the bit. In both cases there may be a transition at the beginning of the bit
to set up the level required to make the correct center transition.
Differential
Manchester A one is represented by a transition at the center of the bit with the opposite direction from the transition
at the center of the preceding bit. A zero is represented by a transition at the center of the bit with the
same polarity from the transition at the center of the preceding bit.
Data
NRZ
NRZI Mark
NRZI Space
FM0
FM1
Manchester
Differential
Manchester
0 1 1 0 0 1