Motorola MPC8260 - Manual (Page 241)

MOTOROLA Chapter 8. The 60x Bus 8-9
Part III. The Hardware Interface
Figure 8-4. Address Bus Arbitration with External Bus Master
8.4.2 Address Pipelining
The MPC8260 supports one-level address pipelining by asserting AACK to the current bus
master when its data tenure starts and by granting the address bus to the next requesting
device before the current data bus tenure completes. Address pipelining improves data
throughput by allowing the memory-control hardware to decode a new set of address and
control signals while the current data transaction Þnishes. The MPC8260 pipelines data bus
operations in strict order with the associated address operations. Figure 8-5 shows how
address pipelining allows address tenures to overlap the associated data tenures.
CLKOUT
BR INT
BG INT MPC8260
BR
BG
ABB
ADDR+ MPC8260 External External
TS
AACK
ARTRY