2 data transfer types as programmed in dcm, 3 programming dts and sts, Data transfer types as programmed in dcm -20 – Motorola MPC8260 User Manual
Page 544: Programming dts and sts -20, Idma channel data transfer operation -20, See table 18-6
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18-20
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV. Communications Processor Module
18.8.2.2 Data Transfer Types as Programmed in DCM
Table 18-6 summarizes the types of data transfers according to the DCM programming.
18.8.2.3 Programming DTS and STS
The options for setting STS and DTS depend on (DCM[DMA_WRAP]) and are described
in the following tables for memory/memory and memory/peripheral transfers.
Table 18-6. IDMA Channel Data Transfer Operation
S/D
FB
Read From
Write To
Description (Steady-State Operation)
01
0
Memory
(STS = SS_MAX)
Peripheral
(DTS = port size
or 32)
Read from memory: Filling internal buffer in one DMA transfer.
On the bus: one burst or more, depends on STS
Write to peripheral: In smaller transfers until internal buffer empties.
On the bus: singles or burst, depends on DTS
10
0
Peripheral
(STS = port size or
32)
Memory
(DTS =
SS_MAX)
Read from peripheral: Filling internal buffer in several DMA
transfers.
On the bus: singles or burst, depends on STS
Write to memory: in one DMA transfer, internal buffer empties.
On the bus: one burst or more, depends on DTS
00
0
Memory
(STS = SS_MAX)
Memory
(DTS =
SS_MAX or
less)
Read from memory: Filling internal buffer in one DMA transfer.
On the bus: one burst or more, depends on STS
Write to memory: in one transfer or more until internal buffer
empties.
On the bus: singles or bursts, depends on DTS
00
0
Memory
(STS = SS_MAX
or less)
Memory
(DTS =
SS_MAX)
Read from memory: Filling internal buffer in one or more DMA
transfers.
On the bus: singles or bursts, depends on STS
Write to memory: in one DMA transfer, internal buffer empties.
On the bus: one burst or more, depends on DTS
01
1
Memory to
peripheral
(DTS = port size or
32)
Ñ
Read transaction from memory while asserting DACK to
peripheral. Peripheral samples the data read from memory.
On the bus: singles or bursts, depends on DTS
10
1
Ñ
Peripheral to
memory
(STS = port size
or 32)
Write transaction to memory while asserting DACK to peripheral.
Peripheral provides the data that is written to the memory.
On the bus: singles or bursts, depends on STS