NXP Semiconductors LPC24XX UM10237 - Manual (Page 785)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 785 of 792
NXP Semiconductors
UM10237
Chapter 36: LPC24XX Supplementary information
8.14 Transmit Identifier Register (CAN1TID[1/2/3] -
0xE004 40[34/44/54], CAN2TID[1/2/3] -
0xE004 80[34/44/54]) . . . . . . . . . . . . . . . . . . 493
8.15 Transmit Data Register A (CAN1TDA[1/2/3] -
0xE004 40[38/48/58], CAN2TDA[1/2/3] -
0xE004 80[38/48/58]) . . . . . . . . . . . . . . . . . . 493
8.16 Transmit Data Register B (CAN1TDB[1/2/3] -
0xE004 40[3C/4C/5C], CAN2TDB[1/2/3] -
0xE004 80[3C/4C/5C]) . . . . . . . . . . . . . . . . . 494
9 CAN controller operation . . . . . . . . . . . . . . . 494
9.1 Error handling . . . . . . . . . . . . . . . . . . . . . . . . 494
9.2 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . 494
9.3 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . 495
9.4 Transmit priority . . . . . . . . . . . . . . . . . . . . . . 495
10 Centralized CAN registers. . . . . . . . . . . . . . . 495
10.1 Central Transmit Status Register (CANTxSR -
0xE004 0000) . . . . . . . . . . . . . . . . . . . . . . . . 495
10.2 Central Receive Status Register (CANRxSR -
0xE004 0004) . . . . . . . . . . . . . . . . . . . . . . . . 496
10.3 Central Miscellaneous Status Register (CANMSR
- 0xE004 0008) . . . . . . . . . . . . . . . . . . . . . . . 496
11 Global acceptance filter . . . . . . . . . . . . . . . . 497
12 Acceptance filter modes . . . . . . . . . . . . . . . . 497
12.1 Acceptance filter Off mode . . . . . . . . . . . . . . 497
12.2 Acceptance filter Bypass mode . . . . . . . . . . 498
12.3 Acceptance filter Operating mode . . . . . . . . 498
12.4 FullCAN mode . . . . . . . . . . . . . . . . . . . . . . . 498
13 Sections of the ID look-up table RAM . . . . . 498
14 ID look-up table RAM. . . . . . . . . . . . . . . . . . . 498
15 Acceptance filter registers . . . . . . . . . . . . . . 500
15.1 Acceptance Filter Mode Register (AFMR -
0xE003 C000). . . . . . . . . . . . . . . . . . . . . . . . 500
15.2 Section configuration registers . . . . . . . . . . . 501
15.3 Standard Frame Individual Start Address Register
(SFF_sa - 0xE003 C004) . . . . . . . . . . . . . . . 502
15.4 Standard Frame Group Start Address Register
(SFF_GRP_sa - 0xE003 C008) . . . . . . . . . . 502
15.5 Extended Frame Start Address Register (EFF_sa
- 0xE003 C00C) . . . . . . . . . . . . . . . . . . . . . . 503
15.6 Extended Frame Group Start Address Register
(EFF_GRP_sa - 0xE003 C010) . . . . . . . . . . 503
15.7 End of AF Tables Register (ENDofTable -
0xE003 C014). . . . . . . . . . . . . . . . . . . . . . . . 504
15.8 Status registers . . . . . . . . . . . . . . . . . . . . . . . 504
15.9 LUT Error Address Register (LUTerrAd -
0xE003 C018). . . . . . . . . . . . . . . . . . . . . . . . 504
15.10 LUT Error Register (LUTerr - 0xE003 C01C) 505
15.11 Global FullCANInterrupt Enable register (FCANIE
- 0xE003 C020) . . . . . . . . . . . . . . . . . . . . . . 505
15.12 FullCAN Interrupt and Capture registers
(FCANIC0 - 0xE003 C024 and FCANIC1 -
0xE003 C028). . . . . . . . . . . . . . . . . . . . . . . . 505
16 Configuration and search algorithm . . . . . . 506
16.1 Acceptance filter search algorithm . . . . . . . . 506
17 FullCAN mode . . . . . . . . . . . . . . . . . . . . . . . . 507
17.1 FullCAN message layout . . . . . . . . . . . . . . . 509
17.2 FullCAN interrupts . . . . . . . . . . . . . . . . . . . . . 511
17.2.1 FullCAN message interrupt enable bit . . . . . . 511
17.2.2 Message lost bit and CAN channel number. 512
17.2.3 Setting the interrupt pending bits
(IntPnd 63 to 0) . . . . . . . . . . . . . . . . . . . . . . 513
17.2.4 Clearing the interrupt pending bits
(IntPnd 63 to 0) . . . . . . . . . . . . . . . . . . . . . . 513
17.2.5 Setting the message lost bit of a FullCAN
message object (MsgLost 63 to 0). . . . . . . . 513
17.2.6 Clearing the message lost bit of a FullCAN
message object (MsgLost 63 to 0). . . . . . . . 513
17.3 Set and clear mechanism of the FullCAN
interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
17.3.1 Scenario 1: Normal case, no message lost . 513
17.3.2 Scenario 2: Message lost. . . . . . . . . . . . . . . 514
17.3.3 Scenario 3: Message gets overwritten indicated
by Semaphore bits . . . . . . . . . . . . . . . . . . . . 515
17.3.4 Scenario 3.1: Message gets overwritten indicated
by Semaphore bits and Message Lost. . . . . 515
17.3.5 Scenario 3.2: Message gets overwritten indicated
by Message Lost . . . . . . . . . . . . . . . . . . . . . 516
17.3.6 Scenario 4: Clearing Message Lost bit . . . . 517
18 Examples of acceptance filter tables and ID
index values. . . . . . . . . . . . . . . . . . . . . . . . . . 518
18.1 Example 1: only one section is used . . . . . . 518
18.2 Example 2: all sections are used . . . . . . . . . 518
18.3 Example 3: more than one but not all sections are
used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
18.4 Configuration example 4 . . . . . . . . . . . . . . . 519
18.5 Configuration example 5 . . . . . . . . . . . . . . . 519
18.6 Configuration example 6 . . . . . . . . . . . . . . . 520
Explicit standard frame format identifier section
(11-bit CAN ID): . . . . . . . . . . . . . . . . . . . . . . . 521
Group of standard frame format identifier section
(11-bit CAN ID): . . . . . . . . . . . . . . . . . . . . . . . 521
Explicit extended frame format identifier section
(29-bit CAN ID,
Figure 18–92 ) . . . . . . . . . . . . 521
Group of extended frame format identifier section
(29-bit CAN ID,
Figure 18–92 ) . . . . . . . . . . . . 521
18.7 Configuration example 7 . . . . . . . . . . . . . . . 522
FullCAN explicit standard frame format identfier
section (11-bit CAN ID) . . . . . . . . . . . . . . . . . 523
Explicit standard frame format identifier section
(11-bit CAN ID) . . . . . . . . . . . . . . . . . . . . . . . 523
FullCAN message object data section . . . . . . 523
18.8 Look-up table programming guidelines . . . . 524
Chapter 19: LPC24XX SPI
1 Basic configuration . . . . . . . . . . . . . . . . . . . . 526
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
3 SPI overview . . . . . . . . . . . . . . . . . . . . . . . . . 526
4 SPI data transfers . . . . . . . . . . . . . . . . . . . . . 526