NXP Semiconductors LPC24XX UM10237 - Manual (Page 68)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 68 of 792
1. How to read this chapter
This chapter describes the external memory controller for all LPC2400 parts. For EMC
configurations that are specific to LPC2458 and LPC2420/60/68/70/78, see
Table 5–64 .
2. Basic configuration
The EMC is configured using the following registers:
1. Power: In the PCONP register ( Table 4–63 ), set bit PCEMC.
Remark: The EMC is enabled on reset (PCEMC = 1). On POR and warm reset, the
EMC is enabled as well, see
Table 5–68 and Table 5–71 .
2. Clock: see Table 4–53 .
UM10237
Chapter 5: LPC24XX External Memory Controller (EMC)
Rev. 04 — 26 August 2009 User manual
Table 64. EMC configuration
Data bus
width/
memory
transaction
size Pins SDRAM configuration
registers Static memory
configuration registers External
memory
connection
LPC2458 8-bit, 16-bit A[19:0]
D[15:0]
OE, WE
BLS[1:0]
CS[1:0]
DYCS[1:0]
CAS, RAS
CLKOUT[1:0]
CKEOUT[1:0]
DQMOUT[1:0]
EMCDynamic Config1/0
EMCDynamic RasCas1/0
EMCStatic Config1/0
EMCStatic WaitWen1/0
EMCStatic WaitOen1/0
EMCStatic WaitRd1/0
EMCStatic WaitPage1/0
EMCStatic WaitWr1/0
EMCStatic WaitTurn1/0
Section 5–11.2 ,
Section 5–11.3
LPC2420,
LPC2460,
LPC2468,
LPC2470,
LPC2478
8-bit, 16-bit,
32-bit A[23:0]
D[31:0]
OE, WE
BLS[3:0]
CS[3:0]
DYCS[3:0]
CAS, RAS
CLKOUT[1:0]
CKEOUT[3:0]
DQMOUT[3:0]
EMCDynamic
Config3/2/1/0
EMCDynamic
RasCas3/2/1/0
EMCStatic Config3/2/1/0
EMCStatic
WaitWen3/2/1/0
EMCStatic
WaitOen3/2/1/0
EMCStatic WaitRd3/2/1/0
EMCStatic
WaitPage3/2/1/0
EMCStatic WaitWr3/2/1/0
EMCStatic
WaitTurn3/2/1/0
Section 5–11.1 ,
Section 5–11.2 ,
Section 5–11.3