9 bus mode, 10 crc token status, Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual
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User manual
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NXP Semiconductors
UM10237
Chapter 21: LPC24XX SD/MMC card interface
The data block counter determines the end of a data block. If the counter is zero, the
end-of-data condition is TRUE (see
Section 21–6.9 “Data Control Register (MCIDataCtrl -
for more information).
5.3.9 Bus mode
In wide bus mode, all four data signals (MCIDAT[3:0]) are used to transfer data, and the
CRC code is calculated separately for each data signal. While transmitting data blocks to
a card, only MCIDAT0 is used for the CRC token and busy signalling. The start bit must be
transmitted on all four data signals at the same time (during the same clock period). If the
start bit is not detected on all data signals on the same clock edge while receiving data,
the DPSM sets the start bit error flag and moves to the IDLE state.
The data path also operates in half-duplex mode, where data is either sent to a card or
received from a card. While not being transferred, MCIDAT[3:0] are in the HI-Z state.
Data on these signals is synchronous to the rising edge of the clock period.
If standard bus mode is selected the MCIDAT[3:1] outputs are always in HI-Z state and
only the MCIDAT0 output is driven LOW when data is transmitted.
Design note: If wide mode is selected, both nMCIDAT0EN and nMCIDATEN outputs are
driven low at the same time. If not, the MCIDAT[3:1] outputs are always in HI-Z state
(nMCIDATEN) is driven HIGH), and only the MCIDAT0 output is driven LOW when data is
transmitted.
5.3.10 CRC Token status
The CRC token status follows each write data block, and determines whether a card has
received the data block correctly. When the token has been received, the card asserts a
busy signal by driving MCIDAT0 LOW.
shows the CRC token status values.
Fig 110. Pending command start
data
counter
MCICLK
MCICMD
cmd state
MCIDAT0
CmdPend
3
2
1
0
7
6
5
4
3
2
1
Z
Z
Z
Z
Z
S
CMD
CMD
CMD
CMD
CMD
7
6
PEND
SEND
Table 486. CRC token status
Token
Description
010
Card has received error-free data block.
101
Card has detected a CRC error.