NXP Semiconductors LPC24XX UM10237 - Manual (Page 673)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 673 of 792
NXP Semiconductors
UM10237
Chapter 28: LPC24XX Analog-to Digital Converter (ADC)
6. Operation
6.1 Hardware-triggered conversion
If the BURST bit in the ADCR is 0 and the START field contains 010-111, the A/D
converter will start a conversion when a transition occurs on a selected pin or Timer Match
signal. The choices include conversion on a specified edge of any of 4 Match signals, or
conversion on a specified edge of either of 2 Capture/Match pins. The pin state from the
selected pad or the selected Match signal, XORed with ADCR bit 27, is used in the edge
detection logic.
6.2 Interrupts
An interrupt is requested to the Vectored Interrupt Controller (VIC) when the ADINT bit in
the ADSTAT register is 1. The ADINT bit is one when any of the DONE bits of A/D
channels that are enabled for interrupts (via the ADINTEN register) are one. Software
can use the Interrupt Enable bit in the VIC that corresponds to the ADC to control whether
this results in an interrupt. The result register for an A/D channel that is generating an
interrupt must be read in order to clear the corresponding DONE flag.
6.3 Accuracy vs. digital receiver
While the A/D converter can be used to measure the voltage on any AD0 pin, regardless
of the pin’s setting in the Pin Select register (
Table 9–129 “Summary of pin connect block
registers” on page 178 ), selecting the AD0 function improves the conversion accuracy by
disabling the pin’s digital receiver.