Table 3–26, Section, Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual
Page 30
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UM10237_4
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 04 — 26 August 2009
30 of 792
NXP Semiconductors
UM10237
Chapter 3: LPC24XX System control
3.1.3 External Interrupt Mode register (EXTMODE - 0xE01F C148)
The bits in this register select whether each EINT pin is level- or edge-sensitive. Only pins
that are selected for the EINT function (see
) and enabled in the
VICIntEnable register (
Section 7–3.4 “Interrupt Enable Register (VICIntEnable -
) can cause interrupts from the External Interrupt function (though of
course pins selected for other functions may cause interrupts from those functions).
Note: Software should only change a bit in this register when its interrupt is
disabled in VICIntEnable, and should write the corresponding 1 to EXTINT before
enabling (initializing) or re-enabling the interrupt. An extraneous interrupt(s) could
be set by changing the mode and not having the EXTINT cleared.
3.1.4 External Interrupt Polarity register (EXTPOLAR - 0xE01F C14C)
In level-sensitive mode, the bits in this register select whether the corresponding pin is
high- or low-active. In edge-sensitive mode, they select whether the pin is rising- or
falling-edge sensitive. Only pins that are selected for the EINT function (see
) and enabled in the VICIntEnable register (
Section 7–3.4 “Interrupt Enable
Register (VICIntEnable - 0xFFFF F010)”
) can cause interrupts from the External Interrupt
function (though of course pins selected for other functions may cause interrupts from
those functions).
Note: Software should only change a bit in this register when its interrupt is
disabled in VICIntEnable, and should write the corresponding 1 to EXTINT before
enabling (initializing) or re-enabling the interrupt. An extraneous interrupt(s) could
be set by changing the polarity and not having the EXTINT cleared.
Table 26.
External Interrupt Mode register (EXTMODE - address 0xE01F C148) bit
description
Bit
Symbol
Value
Description
Reset
value
0
EXTMODE0 0
Level-sensitivity is selected for EINT0.
0
1
EINT0 is edge sensitive.
1
EXTMODE1 0
Level-sensitivity is selected for EINT1.
0
1
EINT1 is edge sensitive.
2
EXTMODE2 0
Level-sensitivity is selected for EINT2.
0
1
EINT2 is edge sensitive.
3
EXTMODE3 0
Level-sensitivity is selected for EINT3.
0
1
EINT3 is edge sensitive.
7:4
-
-
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA