Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual
Page 138
UM10237_4
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 04 — 26 August 2009
138 of 792
NXP Semiconductors
UM10237
Chapter 8: LPC24XX Pin configuration
14
P2[1]/PWM1[2]/RXD1/
PIPESTAT0
15
V
SSIO
16
P2[3]/PWM1[4]/
DCD1/PIPESTAT2
17
P2[6]/PCAP1[0]/
RI1/TRACEPKT1
Row F
1
P0[25]/AD0[2]/
I2SRX_SDA/TXD3
2
P3[4]/D4
3
P3[29]/D29/
MAT1[0]/PWM1[6]
4
DBGEN
14
P4[11]/A11
15
P3[17]/D17/
PWM0[2]/RXD1
16
P2[5]/PWM1[6]/
DTR1/TRACEPKT0
17
P3[16]/D16/
PWM0[1]/TXD1
Row G
1
P3[5]/D5
2
P0[24]/AD0[1]/
I2SRX_WS/CAP3[1]
3
V
DD(3V3)
4
V
DDA
14
NC
15
P4[27]/BLS1
16
P2[7]/RD2/
RTS1/TRACEPKT2
17
P4[10]/A10
Row H
1
P0[23]/AD0[0]/
I2SRX_CLK/CAP3[0]
2
P3[14]/D14
3
P3[30]/D30/
MAT1[1]/RTS1
4
V
DD(DCDC)(3V3)
14
V
SSIO
15
P2[8]/TD2/
TXD2/TRACEPKT3
16
P2[9]/
USB_CONNECT1/
RXD2/EXTIN0
17
P4[9]/A9
Row J
1
P3[6]/D6
2
V
SSA
3
P3[31]/D31/MAT1[2]
4
NC
14
P0[16]/RXD1/
SSEL0/SSEL
15
P4[23]/A23/
RXD2/MOSI1
16
P0[15]/TXD1/
SCK0/SCK
17
P4[8]/A8
Row K
1
VREF
2
RTCX1
3
RSTOUT
4
V
SSCORE
14
P4[22]/A22/
TXD2/MISO1
15
P0[18]/DCD1/
MOSI0/MOSI
16
V
DD(3V3)
17
P0[17]/CTS1/
MISO0/MISO
Row L
1
P3[7]/D7
2
RTCX2
3
V
SSIO
4
P2[30]/DQMOUT2/
MAT3[2]/SDA2
14
NC
15
P4[26]/BLS0
16
P4[7]/A7
17
P0[19]/DSR1/
MCICLK/SDA1
Row M
1
P3[15]/D15
2
RESET
3
VBAT
4
XTAL1
14
P4[6]/A6
15
P4[21]/A21/
SCL2/SSEL1
16
P0[21]/RI1/
MCIPWR/RD1
17
P0[20]/DTR1/
MCICMD/SCL1
Row N
1
ALARM
2
P2[31]/DQMOUT3/
MAT3[3]/SCL2
3
P2[29]/DQMOUT1
4
XTAL2
14
P2[12]/EINT2/
MCIDAT2/I2STX_WS
15
P2[10]/EINT0
16
V
SSIO
17
P0[22]/RTS1/
MCIDAT0/TD1
Row P
1
P1[31]/USB_OVRCR2/
SCK1/AD0[5]
2
P1[30]/USB_PWRD2/
V
BUS
/AD0[4]
3
P2[27]/CKEOUT3/
MAT3[1]/MOSI0
4
P2[28]/DQMOUT0
5
P2[24]/CKEOUT0
6
V
DD(3V3)
7
P1[18]/USB_UP_LED1/
PWM1[1]/CAP1[0]
8
V
DD(3V3)
Table 121. LPC2420/60/68 pin allocation table
…continued
CAN and Ethernet pins for LPC2460/68 only.
Pin Symbol
Pin Symbol
Pin Symbol
Pin Symbol