NXP Semiconductors LPC24XX UM10237 - Manual (Page 28)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 28 of 792
NXP Semiconductors
UM10237
Chapter 3: LPC24XX System control
[1] Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
3.1 External interrupt inputs
The LPC2400 includes four External Interrupt Inputs as selectable pin functions. In
addition, external interrupts have the ability to wake up the CPU from Power-down mode.
This is controlled by the register INTWAKE, which is described in the Clocking and Power
Control chapter under the Power Control heading
3.1.1 Register description
The external interrupt function has four registers associated with it. The EXTINT register
contains the interrupt flags. The EXTMODE and EXTPOLAR registers specify the level
and edge sensitivity parameters.
[1] Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
3.1.2 External Interrupt flag register (EXTINT - 0xE01F C140)
When a pin is selected for its external interrupt function, the level or edge on that pin
(selected by its bits in the EXTPOLAR and EXTMODE registers) will set its interrupt flag in
this register. This asserts the corresponding interrupt request to the VIC, which will cause
an interrupt if interrupts from the pin are enabled.
Writing ones to bits EINT0 through EINT3 in EXTINT register clears the corresponding
bits. In level-sensitive mode the interrupt is cleared only when the pin is in its inactive
state.
Reset
RSID Reset Source Identification
Register R/W see text 0xE01F C180
AHB priority scheduling registers
AHBCFG1 Configures the AHB1 arbiter R/W 0x0000 0145 0xE01F C188
AHBCFG2 Configures the AHB2 arbiter R/W 0x0000 0145 0xE01F C18C
Syscon miscellaneous registers
SCS System Control and Status R/W 0x00 0xE01F C1A0
Table 23. Summary of system control registers
Name Description Access Reset value [1] Address
Table 24. External Interrupt registers
Name Description Access Reset
value [1]
Address
EXTINT The External Interrupt Flag Register contains
interrupt flags for EINT0, EINT1, EINT2 and
EINT3. See
Table 3–25 .
R/W 0x00 0xE01F C140
EXTMODE The External Interrupt Mode Register controls
whether each pin is edge- or level-sensitive.
See
Table 3–26 .
R/W 0x00 0xE01F C148
EXTPOLAR The External Interrupt Polarity Register controls
which level or edge on each pin will cause an
interrupt. See
Table 3–27 .
R/W 0x00 0xE01F C14C