NXP Semiconductors LPC24XX UM10237 - Manual (Page 330)

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User manual Rev. 04 — 26 August 2009 330 of 792
NXP Semiconductors
UM10237
Chapter 13: LPC24XX USB device controller
3. Features
• Fully compliant with the USB 2.0 specification (full speed).
• Supports 32 physical (16 logical) endpoints.
• Supports Control, Bulk, Interrupt and Isochronous endpoints.
• Scalable realization of endpoints at run time.
• Endpoint maximum packet size selection (up to USB maximum specification) by
software at run time.
• Supports SoftConnect and GoodLink features.
• Supports DMA transfers on all non-control endpoints.
• Allows dynamic switching between CPU controlled and DMA modes.
• Double buffer implementation for Bulk and Isochronous endpoints.
4. Fixed endpoint configuration
Table 13–290 shows the supported endpoint configurations. Endpoints are realized and
configured at run time using the Endpoint realization registers, documented in Section
13–9.5 “Endpoint realization registers” .
EOP End-Of-Packet
EP Endpoint
EP_RAM Endpoint RAM
FS Full Speed
LED Light Emitting Diode
LS Low Speed
MPS Maximum Packet Size
NAK Negative Acknowledge
PLL Phase Locked Loop
RAM Random Access Memory
SOF Start-Of-Frame
SIE Serial Interface Engine
SRAM Synchronous RAM
UDCA USB Device Communication Area
USB Universal Serial Bus
Table 289. USB related acronyms, abbreviations, and definitions used in this chapter
Acronym/abbreviation Description
Table 290. Fixed endpoint configuration
Logical
endpoint Physical
endpoint Endpoint type Direction Packet size (bytes) Double buffer
0 0 Control Out 8, 16, 32, 64 No
0 1 Control In 8, 16, 32, 64 No
1 2 Interrupt Out 1 to 64 No
1 3 Interrupt In 1 to 64 No