NXP Semiconductors LPC24XX UM10237 - Manual (Page 2)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 2 of 792
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NXP Semiconductors
UM10237
LPC24XX User manual
Revision history
Rev Date Description
04 20090826 LPC24XX user manual release.
Modifications:
• Memory size for LPC2458 external SRAM memory corrected in Table 2–14 .
•
Deep power-down mode functionality added (see Section 4–3.4 “Power control” and
Section 26–6.6 “Alarm output” ).
•
Register containing device revision added (implemented starting with revision C, see
Section 30–9.11 ).
•
XTAL1 input selection and PCB layout guidelines added (see Section 4–2.2 ).
• Editorial updates throughout the user manual.
• ISP1302 replaces ISP1301 in Section 15–6 .
• UART fractional baud rate generator disabled in auto baud mode (see Section 16–4.10
and Section 17–4.14 ).
03 20090115 LPC24XX user manual release.
Modifications:
Description of AHB1 and AHB2 configuration registers updated.
02 20081219 LPC24XX user manual release.
Modifications:
• Added parts LPC2420.
•
Editorial updates.
•
AHB1 and AHB2 configuration registers added.
01 20080718 Initial LPC24XX user manual release. Replaces all draft versions UM10237_1.00 to
UM10237_1.05.