NXP Semiconductors LPC24XX UM10237 - Manual (Page 590)

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User manual Rev. 04 — 26 August 2009 590 of 792
NXP Semiconductors
UM10237
Chapter 22: LPC24XX I 2 C interfaces I 2 C0/1/2
Fig 120. Format and States in the Master Transmitter mode
DATA
A
R
W SLA S
DATA A W SLA
to Master
receive
mode,
entry
= MR
MT
to corresponding
states in Slave mode
A OR A A OR A
A
other Master
continues
other Master
continues
A
other Master
continues
20H
08H 18H 28H
30H
10H
68H 78H B0H
38H 38H
arbitration lost
in Slave
address or
Data byte
Not
Acknowledge
received after a
Data byte
Not
Acknowledge
received after
the Slave
address
next transfer
started with a
Repeated Start
condition
arbitration lost
and
addressed as
Slave
successful
transmission
to a Slave
Receiver
from Master to Slave
from Slave to Master
any number of data bytes and their associated Acknowledge bits
n
this number (contained in I2STA) corresponds to a defined state of the
I
2 C bus
A P
P
S P