NXP Semiconductors LPC24XX UM10237 User Manual
Page 754
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UM10237_4
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 04 — 26 August 2009
754 of 792
NXP Semiconductors
UM10237
Chapter 35: LPC24XX RealMonitor
NOP ; Insert User code valid signature here.
LDR pc, [pc, #-0x120] ;Load IRQ vector from VIC
LDR PC, FIQ_Address
Reset_Address
DCD __init
;Reset Entry point
Undefined_Address
DCD rm_undef_handler ;Provided by RealMonitor
SWI_Address
DCD 0
;User can put address of SWI handler here
Prefetch_Address
DCD rm_prefetchabort_handler
;Provided by RealMonitor
Abort_Address
DCD rm_dataabort_handler
;Provided by RealMonitor
FIQ_Address
DCD 0
;User can put address of FIQ handler here
AREA init_code, CODE
ram_end EQU 0x4000xxxx ; Top of on-chip RAM.
__init
; /*********************************************************************
; * Set up the stack pointers for various processor modes. Stack grows
; * downwards.
; *********************************************************************/
LDR r2, =ram_end ;Get top of RAM
MRS r0, CPSR ;Save current processor mode
; Initialize the Undef mode stack for RealMonitor use
BIC r1, r0, #0x1f
ORR r1, r1, #0x1b
MSR CPSR_c,
r1
;Keep top 32 bytes for flash programming routines.
;Refer to Flash Memory System and Programming chapter
SUB sp,r2,#0x1F
; Initialize the Abort mode stack for RealMonitor
BIC r1, r0, #0x1f
ORR r1, r1, #0x17
MSR CPSR_c,
r1
;Keep 64 bytes for Undef mode stack
SUB sp,r2,#0x5F
; Initialize the IRQ mode stack for RealMonitor and User
BIC r1, r0, #0x1f
ORR r1, r1, #0x12
MSR CPSR_c,
r1
;Keep 32 bytes for Abort mode stack
SUB sp,r2,#0x7F
; Return to the original mode.
MSR CPSR_c,
r0
; Initialize the stack for user application
; Keep 256 bytes for IRQ mode stack
SUB sp,r2,#0x17F