NXP Semiconductors LPC24XX UM10237 - Manual (Page 336)

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User manual Rev. 04 — 26 August 2009 336 of 792
NXP Semiconductors
UM10237
Chapter 13: LPC24XX USB device controller
After entering the suspend state with DEV_CLK_EN and AHB_CLK_EN cleared, the
DEV_CLK_ON and AHB_CLK_ON will be cleared when the corresponding clock turns off.
When both bits are zero, USB_NEED_CLK will be low, indicating that the chip can be put
into Power-down mode by writing to the PCON register. The status of USB_NEED_CLK
can be read from the USBIntSt register.
Any bus activity in the suspend state will cause the USB_NEED_CLK signal to be
asserted. When the USB is configured to be a wakeup source from power-down
(USBWAKE bit set in the INTWAKE register), the assertion of USB_NEED_CLK causes
the chip to wake up from Power-down mode.
8.4 Remote wake-up
The USB device controller supports software initiated remote wake-up. Remote wake-up
involves resume signaling on the USB bus initiated from the device. This is done by
clearing the SUS bit in the SIE Set Device Status register. Before writing into the register,
all the clocks to the device controller have to be enabled using the USBClkCtrl register.
9. Register description
Table 13–293 shows the USB Device Controller registers directly accessible by the CPU.
The Serial Interface Engine (SIE) has other registers that are indirectly accessible via the
SIE command registers. See
Section 13–11 “Serial interface engine command
description” for more info.
Table 293. Summary of USB device registers
Name Description Access Reset value [1] Address
Port select register
USBPortSel [2] USB Port Select R/W 0x0000 0000 0xFFE0 C110
Clock control registers
USBClkCtrl USB Clock Control R/W 0x0000 0000 0xFFE0 CFF4
USBClkSt USB Clock Status RO 0x0000 0000 0xFFE0 CFF8
Device interrupt registers
USBIntSt USB Interrupt Status R/W 0x8000 0000 0xE01F C1C0
USBDevIntSt USB Device Interrupt Status RO 0x0000 0010 0xFFE0 C200
USBDevIntEn USB Device Interrupt Enable R/W 0x0000 0000 0xFFE0 C204
USBDevIntClr USB Device Interrupt Clear WO 0x0000 0000 0xFFE0 C208
USBDevIntSet USB Device Interrupt Set WO 0x0000 0000 0xFFE0 C20C
USBDevIntPri USB Device Interrupt Priority WO 0x00 0xFFE0 C22C
Endpoint interrupt registers
USBEpIntSt USB Endpoint Interrupt Status RO 0x0000 0000 0xFFE0 C230
USBEpIntEn USB Endpoint Interrupt Enable R/W 0x0000 0000 0xFFE0 C234
USBEpIntClr USB Endpoint Interrupt Clear WO 0x0000 0000 0xFFE0 C238
USBEpIntSet USB Endpoint Interrupt Set WO 0x0000 0000 0xFFE0 C23C
USBEpIntPri USB Endpoint Priority WO [3] 0x0000 0000 0xFFE0 C240
Endpoint realization registers
USBReEp USB Realize Endpoint R/W 0x0000 0003 0xFFE0 C244