Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual
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UM10237_4
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 04 — 26 August 2009
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NXP Semiconductors
UM10237
Chapter 11: LPC24XX Ethernet
Each receive descriptor takes two word locations (8 bytes) in memory. Likewise each
status field takes two words (8 bytes) in memory. Each receive descriptor consists of a
pointer to the data buffer for storing receive data (Packet) and a control word (Control).
The Packet field has a zero address offset, the control field has a 4 byte address offset
with respect to the descriptor address as defined in
.
The data buffer pointer (Packet) is a 32 bits byte aligned address value containing the
base address of the data buffer. The definition of the control word bits is listed in
.
lists the fields in the receive status elements from the status array.
Each receive status consists of two words. The StatusHashCRC word contains a
concatenation of the two 9 bit hash CRCs calculated from the destination and source
addresses contained in the received frame. After detecting the destination and source
addresses, StatusHashCRC is calculated once, then held for every fragment of the same
frame.
The concatenation of the two CRCs is shown in
:
Table 233. Receive Descriptor Fields
Symbol
Address
offset
Bytes Description
Packet
0x0
4
Base address of the data buffer for storing receive data.
Control
0x4
4
Control information, see
Table 234. Receive Descriptor Control Word
Bit
Symbol
Description
10:0
Size
Size in bytes of the data buffer. This is the size of the buffer reserved by the
device driver for a frame or frame fragment i.e. the byte size of the buffer
pointed to by the Packet field. The size is -1 encoded e.g. if the buffer is 8
bytes the size field should be equal to 7.
30:11 -
Unused
31
Interrupt
If true generate an RxDone interrupt when the data in this frame or frame
fragment and the associated status information has been committed to
memory.
Table 235. Receive Status Fields
Symbol
Address
offset
Bytes Description
StatusInfo
0x0
4
Receive status return flags, see
StatusHashCRC 0x4
4
The concatenation of the destination address hash CRC and
the source address hash CRC.
Table 236. Receive Status HashCRC Word
Bit
Symbol
Description
8:0
SAHashCRC Hash CRC calculated from the source address.
15:9
-
Unused
24:16 DAHashCRC Hash CRC calculated from the destination address.
31:25 -
Unused