NXP Semiconductors LPC24XX UM10237 - Manual (Page 329)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 329 of 792
1. Basic configuration
The USB controller is configured using the following registers:
1. Power: In the PCONP register ( Table 4–63 ), set bit PCUSB.
Remark: On reset, the USB block is disabled (PCUSB = 0).
2. Clock: see Table 4–54 .
3. Pins: Select USB pins and their modes in PINSEL0 to PINSEL5 and PINMODE0 to
PINMODE5 ( Section 9–5 ).
4. Wakeup: Use the INTWAKE register ( Table 4–62 ) to enable activity on the USB bus
port to wake up the microcontroller from Power-down mode.
5. Interrupts: See Section 13–10 . Interrupts are enabled in the VIC using the
VICIntEnable register ( Table 7–106 ).
6. Initialization: see Section 13–12 .
2. Introduction
The Universal Serial Bus (USB) is a four-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports hot
plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The host schedules transactions in 1 ms frames. Each frame contains a Start-Of-Frame
(SOF) marker and transactions that transfer data to or from device endpoints. Each device
can have a maximum of 16 logical or 32 physical endpoints. There are four types of
transfers defined for the endpoints. Control transfers are used to configure the device.
Interrupt transfers are used for periodic data transfer. Bulk transfers are used when the
rate of transfer is not critical. Isochronous transfers have guaranteed delivery time but no
error correction.
For more information on the Universal Serial Bus, see the USB Implementers Forum
website.
The USB device controller on the LPC2400 enables full-speed (12 Mb/s) data exchange
with a USB host controller.
UM10237
Chapter 13: LPC24XX USB device controller
Rev. 04 — 26 August 2009 User manual
Table 289. USB related acronyms, abbreviations, and definitions used in this chapter
Acronym/abbreviation Description
AHB Advanced High-performance bus
ATLE Auto Transfer Length Extraction
ATX Analog Transceiver
DD DMA Descriptor
DDP DMA Description Pointer
DMA Direct Memory Access