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6 message handler registers – FUJITSU MB91460 SERIES FR60 User Manual

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Chapter 34 CAN Controller

2.Register Description

(Note)

Byte Data 0 is the first data byte shifted into the shift register of the CAN Core during a reception,
byte Data 7 is the last. When the Message Handler stores a Data Frame, it will write all the eight
data bytes into a Message Object. If the Data Length Code is less than 8, the remaining bytes of the
Message Object will be overwritten by non specified values.

2.6 Message Handler Registers

All Message Handler registers are read-only. Their contents (TxRqst, NewDat, IntPnd, and MsgVal bits of
each Message Object and the Interrupt Identifier) is status information provided by the Message Handler FSM.

Interrupt Register (INTR)

Function of the Interrupt Register (INTR)

• (For 32 message buffer CANs)

• (For 128 message buffer CANs)

IntId15-0

Interrupt Identifier (the number here indicates the source of the interrupt)

0x0000

No interrupt is pending.

0x0001-

0x0020

Number of Message Object which caused the interrupt.

0x0021-

0x7FFF

unused.

0x8000

Status Interrupt.

0x8001-

0xFFFF

unused.

IntId15-0

Interrupt Identifier (the number here indicates the source of the interrupt)

0x0000

No interrupt is pending.

0x0001-

0x0080

Number of Message Object which caused the interrupt.

0x0081-

0x7FFF

unused.

0x8000

Status Interrupt.

IntId15-8

⇐ Bit no.

Read/write

(R)

(R)

(R)

(R)

(R)

(R)

(R)

(R)

Default value

(0)

(0)

(0)

(0)

(0)

(0)

(0)

(0)

Interrupt Register high byte

Address : Base + 0x08

H

15

14

13

12

11

10

9

8

INTRH

IntId7-0

⇐ Bit no.

Read/write

(R)

(R)

(R)

(R)

(R)

(R)

(R)

(R)

Default value

(0)

(0)

(0)

(0)

(0)

(0)

(0)

(0)

Address : Base + 0x09

H

7

6

5

4

3

2

1

0

INTRL

Interrupt Register low byte