beautypg.com

4 ten bit address mask register (itmk0) – FUJITSU MB91460 SERIES FR60 User Manual

Page 693

background image

677

Chapter 33 I2C Controller

2.I2C Interface Registers

2.4 Ten Bit Address Mask Register (ITMK0)

This register contains the ten bit slave address mask and the ten bit slave address enable bit.

[bit 15] ENTB - EnaBle Ten Bit slave address

This bit enables the ten bit slave address (and the acknowleding upon its reception). Write access to this bit is
only possible if the interface is disabled (EN=‘0’ in ICCR0).

[bit 14] RAL - Received slave Address Length

This bit indicates whether the interface was addressed as a seven or ten bit slave. It is read-only.

This bit can be used to determine whether the interface was addressed as a seven or ten bit slave if both
slave addresses are enabled (ENTB=‘1’ and ENSB=‘1’). Its contents is only valid if the AAS bit in the IBSR0
register is ‘1’. This bit is also reset if the interface is disabled (EN=‘0’ in ICCR0).

[bit 13] - [bit 10] Not used.

These bits always read ‘1’.

[bit 9] - [bit 0] TMK - Ten bit slave address MasK (TM9-TM0).

This register is used to mask the ten bit slave address of the interface. Write access to these bits is only
possible if the interface is disabled (EN=‘0’ in ICCR0).

This can be used to make the interface acknowledge on multiple ten bit slave addresses. Only the bits set to
‘1’ in this register are used in the ten bit slave address comparision. The received slave address is written
back to the ITBA0 register and thus may be determined by reading the ITBA0 register if the AAS bit in the

0

Ten bit slave address disabled.

1

Ten bit slave address enabled.

0

Addressed as seven bit slave.

1

Addressed as ten bit slave.

0

Bit is not used in slave address comparision.

1

Bit is used in slave address comparision.

ENTB RAL

---

---

---

---

TM9

TM8

Bit no.

Read/write

(R/W)

(R)

(-)

(-)

(-)

(-)

(R/W) (R/W)

Default value

(0)

(0)

(1)

(1)

(1)

(1)

(1)

(1)

Ten Bit Address Mask high byte

Address : 0000D4

H

15

14

13

12

11

10

9

8

ITMKH0

TM7

TM6

TM5 TM4

TM3

TM2

TM1 TM0

Bit no.

Read/write

(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)

Default value

(1)

(1)

(1)

(1)

(1)

(1)

(1)

(1)

Address : 0000D5

H

7

6

5

4

3

2

1

0

ITMKL0

Ten Bit Address Mask low byte