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FUJITSU MB91460 SERIES FR60 User Manual

Page 531

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515

Chapter 31 External Bus

2.External Bus Interface Registers

The following explains the function of each bit:

[Bits 15-12] ASZ3-0 (Area Size Bits 3-0)

These bits set the area size.

Table 2-1

"Area Size Settings" shows their settings.

Table 2-1 Area Size Settings

ASZ3

ASZ2

ASZ1

ASZ0

Size of each chip select area

0

0

0

0

64 KB (00010000

H

byte, ASR A[31:16] bits are valid)

0

0

0

1

128 KB (00020000

H

byte, ASR A[31:17] bits are valid)

0

0

1

0

256 KB (00040000

H

byte, ASR A[31:18] bits are valid)

0

0

1

1

512 KB (00080000

H

byte, ASR A[31:19] bits are valid)

0

1

0

0

1 MB (00100000

H

byte, ASR A[31:20] bits are valid)

0

1

0

1

2 MB (00200000

H

byte, ASR A[31:21] bits are valid)

0

1

1

0

4 MB (00400000

H

byte, ASR A[31:22] bits are valid)

ACR4H

15

14

13

12

11

10

9

8

15

14

13

12

11

10

9

8

15

14

13

12

11

10

9

8

15

14

13

12

11

10

9

8

0000 0652

H

ASZ3 ASZ2 ASZ1 ASZ0 DBW1 DBW0 BST1 BST0

ACR4L

ACR5H

ACR5L

ACR6H

ACR6L

ACR7H

ACR7L

7

6

5

4

3

2

1

0

0000 0653

H

SREN PFEN WREN LEND TYP3 TYP2 TYP1 TYP0

0000 0656

H

ASZ3 ASZ2 ASZ1 ASZ0 DBW1 DBW0 BST1 BST0

7

6

5

4

3

2

1

0

0000 0657

H

SREN PFEN WREN LEND TYP3 TYP2 TYP1 TYP0

0000 065A

H

ASZ3 ASZ2 ASZ1 ASZ0 DBW1 DBW0 BST1 BST0

7

6

5

4

3

2

1

0

0000 065B

H

SREN PFEN WREN LEND TYP3 TYP2 TYP1 TYP0

SREN PFEN WREN LEND TYP3 TYP2 TYP1 TYP0

0000 065E

H

ASZ3 ASZ2 ASZ1 ASZ0 DBW1 DBW0 BST1 BST0

7

6

5

4

3

2

1

0

0000 065F

H

xxxxxxxx

B

xxxxxxxx

B

W/R

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

W/R

W/R

W/R

W/R

W/R

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

xxxxxxxx

B

W/R

W/R

Initial value

INIT RST Access