FUJITSU MB91460 SERIES FR60 - Manual (Page 37)

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Chapter 2 MB91460 Rev.A/Rev.B Overview
4.Block Diagram
4. Block Diagram
The following illustration shows the block diagram of MB91460 series.
Figure 4-1 Block Diagram MB91460 Series
Resource−/Port−/Test−Pin Multiplexer
I−Bus
Prefetch Flash−I$ 16 kByte
F−Bus
M−Bus
VEC/LEVEL
Port−Bus
Core Group
max.
64K words
DSU4
Memory
Controller
FR60 CPU Core
EDSU/MPU
Bit Search
CAN
DMAC
R−Unit T−Unit
I−Unit
Resources
General Purpose
Ports
External Interrupt
max.
Test Controller
Clock/Reset/Device State Controller
SRAM/
Flash 8MB
Queue
MB91V460
ICE Interface
INT[15:0] Ext. Bus Interface GPIOs/Resource IOs
T−Bus
X−Bus
Resource Group
Port Group
R−Bus
64 kByte GP−RAM
external
Trace RAM
1KByte
EMU RAM
I$
4KB
Data−RAM
64KB
D−Bus
B−Unit
MD[2:0]
INITX
X0/X1
128 words Trace RAM