4 message interface register sets – FUJITSU MB91460 SERIES FR60 User Manual
Page 720
704
Chapter 34 CAN Controller
2.Register Description
■
BRP Extension Register (BRPER)
■
Function of the BRP Extension Register (BRPER)
2.4 Message Interface Register Sets
There are two sets of Interface Registers which are used to control the CPU access to the Message RAM. The
Interface Registers avoid conflicts between CPU access to the Message RAM and CAN message reception
and transmission by buffering the data to be transferred. A complete Message Object (see chapter
“Message Object in the Message Memory” on page 711.
) or parts of the Message Object may be transferred
between the Message RAM and the IFx Message Buffer registers (see chapter
The function of the two interface register sets is identical (except for test mode Basic). They can be used the
way that one set of registers is used for data transfer to the Message RAM while the other set of registers is
used for the data transfer from the Message RAM, allowing both processes to be interrupted by each other.
gives an overview of the two Interface Register sets.
Each set of Interface Registers consists of Message Buffer Registers controlled by their own Command
Registers. The Command Mask Register specifies the direction of the data transfer and which parts of a
Message Object will be transferred. The Command Request Register is used to select a Message Object in
the Message RAM as target or source for the transfer and to start the action specified in the Command Mask
Register.
[bit15-bit4]
res
Reserved Bits
[bit3-bit0]
BRPE
Baud Rate Prescaler Extension
0x00-
0x0F
By programming BRPE the Baud Rate Prescaler can be extended to values up to
1023. The actual interpretation by the hardware is that one more than the value pro-
grammed by BRPE (MSBs) and BRP (LSBs) is used.
res
res
res
res
res
res
res
res
⇐ Bit no.
Read/write
⇒
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
Default value
⇒
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
BRP Extension Register high byte
Address : Base + 0x0C
H
15
14
13
12
11
10
9
8
BRPERH
res
res
res
res
BRPE
⇐ Bit no.
Read/write
⇒
(R)
(R)
(R)
(R)
(R/W) (R/W) (R/W) (R/W)
Default value
⇒
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Address : Base + 0x0D
H
7
6
5
4
3
2
1
0
BRPERL
BRP Extension Register low byte