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Configuration, Chapter 19 timebase timer 3.configuration, Timebase timer – FUJITSU MB91460 SERIES FR60 User Manual

Page 280: Selector edge detection

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Chapter 19 Timebase Timer

3.Configuration

3. Configuration

Figure 3-1 Configuration

Figure 3-2 List of Registers

1

0

Timebase

Timer interrupt

(#46)

Timebase counter

(26-bit counter)

Base clock

(

φ)

Interval time

TBCR:bit 6

0

1

CTBR

Timer clear

TBIF

TBCR:bit 7

0

1

Without interrupt request

With interrupt request

WRITE; 0: Flag clear

Selector

Edge detection

2

1

2

2

2

3

2

4

2

10

2

11

2

12

2

13

2

14

2

15

2

16

2

17

2

18

2

19

2

20

2

21

2

22

2

23

0

1

2

3

2

24

2

25

2

26

TBC2-TBC0

TBCR:bit 5 -3

2

11

0

0

1

1

0

1

1

0

2

12

2

13

2

22

2

23

0

0

1

1

0

1

1

0

2

24

2

25

2

26

1

0

1

0

1

1

1

1

Timebase timer

Timebase timer

0

TBIE

Interrupt disable

Interrupt enable

CTBR

Clears the counter
after writing "A5h"
and then "5Ah."

TBIF

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

0

φ

x

φ

x

φ

x

φ

x

φ

x

φ

x

φ

x

φ

x