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Addressing – FUJITSU MB91460 SERIES FR60 User Manual

Page 127

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Chapter 4 CPU Architecture

9.Addressing

9. Addressing

Address space is 32-bit linear.

Map

Figure 9-1 Map

FR60’s logical address space is 4GB (2

32

addresses), CPU accesses the data linearly.

Direct Addressing Area

The following areas are used for I/O.

These spaces are referred to as direct addressing area where you can specify direct operand address by the
instruction.

These direct areas vary by data size to be accessed.

Byte access

: 0 - 0FF

H

Half-word access : 0 - 1FF

H

Word access

: 0 - 3FF

H

0000 0000

H

0000 0100

H

0000 0200

H

0000 0400

H

Direct addressing area

000F FC00

H

000F FFFF

H

FFFF FFFF

H

Byte data

Half-word data

Word data

Vector table