FUJITSU MB91460 SERIES FR60 User Manual
Page 723

707
Chapter 34 CAN Controller
2.Register Description
■
Function of the IFx Command Mask Register (IFxCMSK)
The other bits of IFx Command Mask Register have different functions depending on the transfer direction :
• Direction = Write
[bit15-bit8]
res
Reserved Bits
[bit7]
WR/RD
Write / Read
0
Read: Transfer data from the Message Object addressed by the Command Request
Register into the selected Message Buffer Registers.
1
Write: Transfer data from the selected Message Buffer Registers to the Message
Object addressed by the Command Request Register.
[bit6]
Mask
Access Mask Bits
0
Mask bits unchanged.
1
Transfer Identifier Mask + MDir + MXtd to Message Object.
[bit5]
Arb
Access Arbitration Bits
0
Arbitration bits unchanged.
1
Transfer Identifier + Dir + Xtd + MsgVal to Message Object.
[bit4]
Control
Access Control Bits
0
Control Bits unchanged.
1
Transfer Control Bits to Message Object.
[bit3]
CIP
Clear Interrupt Pending Bit
When writing to a Message Object, this bit is ignored.
[bit2]
TxReq/
NewDat
Access Transmission Request Bit
0
TxRqst bit unchanged
1
set TxRqst bit
[bit1]
Data A
Access Data Bytes 0-3
0
Data Bytes 0-3 unchanged.
1
Transfer Data Bytes 0-3 to Message Object.
[bit0]
Data B
Access Data Bytes 4-7