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Block diagram – FUJITSU MB91460 SERIES FR60 User Manual

Page 350

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Chapter 26 DMA Controller

1.Overview of the DMA Controller (DMAC)

Block Diagram

Figure 1-1

"Block Diagram of the DMA Controller (DMAC)" is a block diagram of the DMA controller (DMAC).

Figure 1-1 Block Diagram of the DMA Controller (DMAC)

State

transition

circuit

DMA control

BLK register

DTC 2-stage register DTCR

DSAD 2-stage register

DDAD 2-stage register

TYPE.MOD,WS

DSS[3:0]

ERIR,EDIR

SADM,SASZ[7:0]

DADM,DASZ[7:0]

SADR

DADR

Read

Write

Access

address

Selector

Selector

Selector

Counter

X-bus

To interrupt controller

IRQ[4:0]

Priority circuit

Peripheral activation request/stop input

Write back

Write back

Buffer

Selector

Counter

Buffer

MCLREQ

Read/write

control

To bus
controller

DMA transfer request to

the bus controller

DMA activation

source

selection circuit

& request

acceptance

control

External pin activation request/stop input

Peripheral interrupt clear

Bus control unit

Bus control unit

Address counter

Counter buf

fer

Counter buf

fer

W

rite back