FUJITSU MB91460 SERIES FR60 - Manual (Page 637)

621
Chapter 32 USART (LIN / FIFO)
4.USART Registers
4. USART Registers
The following table defines the USART04 registers:
(Note) FSR (FIFO status register) and FCR (FIFO control register) register are only available on USARTs
with FIFO option, i.e. USART ch. 4-7.
4.1 Serial Control Register 04 (SCR04)
This register specifies parity bits, selects the stop bit and data lengths, selects a frame data format in mode 1,
clears the reception error flag, and specifies whether to enable transmission and reception.
Table 4-1 USART04 Registers
Address bit 15 bit 8 bit 7 bit 0
060
H
, 061
H
SCR04 (Serial Control Register) SMR04 (Serial Mode Register)
062
H
, 063
H
SSR04 (Serial Status Register) RDR04/TDR04 (Rx, Tx Data Register)
064
H
, 065
H
ESCR04 (Extended Status/Control
Reg.) ECCR04 (Extended Comm. Contr.
Reg.)
066
H
, 067
H
FSR04 (FIFO status register) FCR04 (FIFO control register)
088
H
, 089
H
BGR104 (Baud Rate Generator Reg. 1) BGR004 (Baud Rate Generator Reg. 0)