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Recommended settings – FUJITSU MB91460 SERIES FR60 User Manual

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248

Chapter 17 Clock Modulator

3.Application Note

recommended.

Recommended settings

The following table lists some example conditions for PLL clock and maximal allowed MCU clock frequency and

the recommended clock modulator setting:

Please refer to the datasheet of each device about modulation parameter settings.

1.

define the required PLL frequency based on
performance needs

e.g. 16 MHz

2.

determine the maximal allowed clock frequency of
the MCU

e.g. 32 MHz

3.

choose the setting with the highest resolution and
the highest modulation degree, whose maximal
frequency is below the maximal allowed clock
frequency of the MCU.

e.g. resolution:7, degree:2, CMPR=0x05F2
(F

max

= 30.34 MHz)

4.

perform EMI measurements

5.

if the EMI measurements does not fulfill the
requirements, you may either

reduce the modulation degree at the same
frequency resolution
(this may improve the reduction in the upper
frequency band > 100 MHz, but decrease the
reduction of the fundamental < 100 MHz)

e.g. resolution:7, degree:1, CMPR=0x03F9

or
increase the modulation degree at a lower
frequency resolution
(this may improve the reduction of the fundamental
< 100 MHz, but worsen the reduction in the upper
frequency band > 100 MHz)

or
e.g. resolution:5, degree:3, CMPR=0x0771

6.

repeat item 3) with the new setting and continue
until the best settings is identified

Table 3-1 Some example conditions for PLL clock

F0

PLL clock

frequency

maximal allowed

MCU clock

frequency (refer

to the data

sheet)

clock modulator setting

resolution

modulation

degree

F

max

CMPR