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FUJITSU MB91460 SERIES FR60 User Manual

Page 700

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684

Chapter 33 I2C Controller

2.I2C Interface Registers

SCL Waveforms

Figure 2-1 SCL Waveforms

Figure

2-1

shows the SCL waveform for sending of address and data bits. The timings given in

the figure are prescaler periods (e.g. ‘9’ means 9 times the prescaler count based on the R-Bus
clock). The timings in the figure are only valid if no other device on the I2C bus influences the
SCL timing.

Address sending

Data sending

9

9

6

7

5

7

5

7

Time unit: Prescaler cycles

5

7

5

7