FUJITSU MB91460 SERIES FR60 - Manual (Page 233)

217
Chapter 15 CAN Clock Prescaler
1.Overview
Chapter 15 CAN Clock Prescaler
1. Overview
• This blockdiagram (simplified) shows the integration of the CAN and the CAN Interface with the CAN clock
prescaler logic (1/C) and clock source selector.
• Remark: If the CLKCAN source is set either to main oscillator or to PLL output then the clock for the
CAN is not influenced by the clock modulation. If the CLKCAN source is set core clock CLKB then
the clock for the CAN is also modulated (if the clock modulator is enabled).
2. Features
• CAN clock source selectable out of Main Oscillation, Base Clock (CLKB) and PLL output
• Free programmable divide-by-C counter in the range of 1..16
• Individual clock disable function for each CAN controller
X
FB
Clock Unit
1/C
CK
CLKB
MAIN
Osc.
CAN Clock Prescaler
M
U
X
PLL CAN
Controller
CAN
Interface
CLKCAN
CLKB
D-Bus
RX/TX
CLKCAN
CLKB