FUJITSU MB91460 SERIES FR60 - Manual (Page 908)

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Chapter 44 A/D Converter
3.Registers of A/D Converter
Continuous mode: Repeated A/D conversion cycles from selected channels ANS4 to ANS0 to selected
channels ANE4 to ANE0.
Stop mode: A/D conversion for each channel from selected ANS4 to ANS0 to selected channels ANE4 to
ANE0, followed by a pause. Restart is determined by the occurrence of a start source.
When A/D conversion is started in continuous mode or stop mode, conversion operation continued until
stopped by the BUSY bit.
Conversion is stopped by writing "0" to the BUSY bit.
On activation after forcibly stopping, conversion starts from channel selected ANS4 to ANS0.
All restarts are disabled for any of the timer, external trigger and software start sources in single,
continuous and stop modes.
[bit 5] S10
This bit defines resolution of A/D conversion. If this bit set "0", the resolution is 10-bit. In the other case,
resolution is 8-bit and the conversion result is stored to ADCR0.
Initialized to "0" by a reset.
[bit 4 to 0] ACH4-0 (Analog convert select channel)
These bits show current converted channel.
Initialized to "0000" by reset.
3.3 Data Register (ADCR1, ADCR0)
These registers store the conversion results of the A/D converter. ADCR0 stores lower 8-bit. ADCR1 stores upper
ACH4 ACH3 ACH2 ACH1 ACH0 Converted channel
0 0 0 0 0 AN0
0 0 0 0 1 AN1
0 0 0 1 0 AN2
0 0 0 1 1 AN3
0 0 1 0 0 AN4
0 0 1 0 1 AN5
0 0 1 1 0 AN6
0 0 1 1 1 AN7
0 1 0 0 0 AN8
0 1 0 0 1 AN9
0 1 0 1 0 AN10
0 1 0 1 1 AN11
0 1 1 0 0 AN12
0 1 1 0 1 AN13
0 1 1 1 0 AN14
0 1 1 1 1 AN15
1 0 0 0 0 AN16
1 0 0 0 1 AN17
1 0 0 1 0 AN18
1 0 0 1 1 AN19
1 0 1 0 0 AN20
1 0 1 0 1 AN21
1 0 1 1 0 AN22
1 0 1 1 1 AN23
1 1 0 0 0 AN24
1 1 0 0 1 AN25
1 1 0 1 0 AN26
1 1 0 1 1 AN27
1 1 1 0 0 AN28
1 1 1 0 1 AN29
1 1 1 1 0 AN30
1 1 1 1 1 AN31
ACH Function
Reading
Current converted channel is shown during A/D converting (BUSY="1"). If
conversion is halt by forcibly stopping, they shows the stopped channel.
Writing No effect to these bits.