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FUJITSU MB91460 SERIES FR60 User Manual

Page 425

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409

Chapter 29 MPU / EDSU

4.Registers

Remark: Read and write access to all registers is byte, halfword and word.

F0C0

H

BAD16 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

EDSU

F0C4

H

BAD17 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0C8

H

BAD18 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0CC

H

BAD19 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0D0

H

BAD20 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0D4

H

BAD21 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0D8

H

BAD22 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0DC

H

BAD23 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0E0

H

BAD24 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0E4

H

BAD25 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0E8

H

BAD26 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0EC

H

BAD27 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0F0

H

BAD28 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0F4

H

BAD29 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0F8

H

BAD30 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

F0FC

H

BAD31 [R/W]

XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX

1.RMW - read returns ’1’ for each flag, for write only ’0’ (clear) is supported.

Table 4-1 EDSU Registers Summary

Address

Register

Block

+0

+1

+2

+3