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FUJITSU MB91460 SERIES FR60 User Manual

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Chapter 32 USART (LIN / FIFO)

2.USART Configuration

• Specifying a data length

• Selecting a frame data format in mode 1

• Clearing the error flags

• Specifying whether to enable transmission

• Specifying whether to enable reception

• Serial Status Register

This register checks the transmission and reception status and error status, and enables and disables
transmission and reception interrupt requests.

• Extended Status/Control Register

This register provides several LIN functions, direct access to the SIN04 and SOT04 pin and setting for the
USART synchronous clock mode.

• Extended Communication Control Register

The extended communication control register provides bus idle recognition interrupt settings, synchronous
clock settings, and the LIN break generation.

• FIFO Control Register

With the FCR4 register the TX/RX FIFOs can be enabled, the RX interrupt triggerlevel can be set and the
FIFO status register mode can be set.

• FIFO Status Register

With the FSR4 register shows the number of valid RX/TX data in the FIFO buffers.