FUJITSU MB91460 SERIES FR60 - Manual (Page 719)

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Chapter 34 CAN Controller
2.Register Description
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Function of the Test Register (TESTR)
Write access to the Test Register is enabled by setting bit Test in the CAN Control Register. The different test
functions may be combined, but Tx1-0 /= “00” disturbs message transfer.
[bit15-bit8] res Reserved bits
[bit7] Rx Monitors the actual value of the CAN_RX Pin
0 The CAN bus is dominant (CAN_RX = ‘0’).
1 The CAN bus is recessive (CAN_RX = ‘1’).
[bit6-bit5] Tx1-0 Control of CAN_TX pin
00 Reset value, CAN_TX is controlled by the CAN Core.
01 Sample Point can be monitored at CAN_TX pin.
10 CAN_TX pin drives a dominant (‘0’) value.
11 CAN_TX pin drives a recessive (‘1’) value.
[bit4] LBack Loop Back Mode
0 Loop Back Mode is disabled.
1 Loop Back Mode is enabled.
[bit3] Silent Silent Mode
0 Normal operation.
1 The module is in Silent Mode.
[bit2] Basic Basic Mode
0 Basic Mode disabled.
1 IF1 Registers used as Tx Buffer, IF2 Registers used as Rx Buffer.
[bit1-bit0] res Reserved Bits