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Table 2-10. host interface (continued) – Motorola DSP56301 User Manual

Page 43

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Host Interface (HI32)

Signals/Connections

2

-13

HSERR

HIRQ

Output, open

drain

Output, open

drain

Tri-stated

Host System Error—When the HI32 is programmed to interface
with a PCI bus and the HI function is selected, this is the Host
System Error signal.

Host Interrupt Request—When HI32 is programmed to interface
with a universal non-PCI bus and the HI function is selected, this
signal is Host Interrupt Request output.

Port B —When the HI32 is configured as GPIO through the DCTR,
this signal is internally disconnected.

HSTOP

HWR

/HRW

Input/

Output

Input

Tri-stated

Host Stop—When the HI32 is programmed to interface with a PCI
bus and the HI function is selected, this is the Host Stop signal.

Host Write/Host Read-Write—When HI32 is programmed to
interface with a universal non-PCI bus and the HI function is
selected, this signal is Host Write/Host Read-Write Schmitt-trigger
input.

Port B —When the HI32 is configured as GPIO through the DCTR,
this signal is internally disconnected.

HIDSEL

HRD

/

HDS

Input

Input

Input

Host Initialization Device Select—When the HI32 is programmed
to interface with a PCI bus and the HI function is selected, this is the
Host Initialization Device Select signal.

Host Read/Host Data Strobe—When HI32 is programmed to
interface with a universal non-PCI bus and the HI function is
selected, this signal is Host Data Read/Host Data Strobe
Schmitt-trigger input.

Port B —When the HI32 is configured as GPIO through the DCTR,
this signal is internally disconnected.

HFRAME

Input/

Output

Tri-stated

Host Frame—When the HI32 is programmed to interface with a PCI
bus and the HI function is selected, this is the Host cycle Frame
signal.

Non-PCI bus—When HI32 is programmed to interface with a
universal non-PCI bus and the HI function is selected, this signal
must be connected to a pull-up resistor or directly to V

CC

.

Port B —When the HI32 is configured as GPIO through the DCTR,
this signal is internally disconnected.

HCLK

Input

Input

Host Clock—When the HI32 is programmed to interface with a PCI
bus and the HI function is selected, this is the Host Bus Clock input.

Non-PCI bus—When the HI32 is programmed to interface with a
universal non-PCI bus and the HI function is selected, this signal
must be connected to a pull-up resistor or directly to V

CC

.

Port B —When the HI32 is configured as GPIO through the DCTR,
this signal is internally disconnected.

Table 2-10. Host Interface (Continued)

Signal Name

Type

State During

Reset

Signal Description