Motorola DSP56301 - Manual (Page 119)

Host Interface (HI32) 6 -1
Chapter 6
Host Interface (HI32)
The Host Interface (HI32) is a fast parallel host port up to 32 bits wide that can directly
connect to the host bus. The HI32 supports a variety of standard buses and provides glueless
connection with a number of industry-standard microcomputers, microprocessors, DSPs, and
DMA controllers. The DSP56300 core controls host port pin functionality and polarity. The
host bus can operate asynchronously to the DSP clock, so the HI32 registers are divided into
two banks: the host-side bank, which is accessible to the external host, and the DSP-side
bank, which is accessible to the DSP56300 core. Figure 6-1 on page 6-5 is a block diagram
showing the HI32 registers. The HI32 supports three classes of interfaces:
n Peripheral Component Interconnect (PCI) bus, PCI Specification Revision 2.1. In PCI
mode, the HI32 is a dedicated bidirectional initiator/target (master/slave) parallel port
with a 32-bit wide data path up to eight words deep. The HI32 can directly connect to
the PCI bus.
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n Universal bus interface. In Universal Bus (UB) modes, the HI32 is a dedicated
bidirectional slave-only parallel port with a six word deep data path up to 24 bits wide.
In this mode, the HI32 can directly connect to 8-bit data buses, 16-bit data buses (for
example, ISA/EISA, Micro Channel), and 24-bit data buses (for example, DSP56300
core-based DSP Port A bus).
n General-purpose I/O (GPIO) port. The DSP56300 core can program unused host port
pins as GPIO pins. The HI32 provides up to 24 GPIO pins.
6.1 Features
This section discusses the DSP56301 host interface features as they apply to the DSP56300
core interface, the host interface, PCI mode, and Universal Bus mode.
1. Two Motorola application notes cover HI32 operation in PCI mode: AN1780/D, DSP563xx HI32 As A PCI
Agent, and AN1788/D, DSP563xx HI32 PCI Functions. These application notes, and accompanying code
files, are available at:
http://www.mot.com/SPS/DSP/Documentation/appnotes.html .