Motorola DSP56301 - Manual (Page 306)

A -10 DSP56301 User’s Manual
movep X:M_DRXR,y0 ; Store starting address
insert x1,x0,a ; concatenate next 16-bit word
insert y1,y0,a ; concatenate next 16-bit word
move a1,r0 ; start to p-mem
move a0,a1 ; number of words to transfer
; Download P memory through UB
lsr a r0,r1 ; divide loop count by 2 and save r0
do a1,_LOOP4 ; Load instruction words
_LBLE
jset #2,X:M_DSR,_LBLF ; Wait for SRRQ to go high (i.e. data ready)
jclr #3,X:M_DSR,_LBLE ; If HF0=1, stop loading new data.
bra
_LBLF
movep X:M_DRXR,a0 ; Store 16-bit data in accumulator
_LBLG
jset #2,X:M_DSR,_LBLH ; Wait for SRRQ to go high (i.e. data ready)
jclr #3,X:M_DSR,_LBLG ; If HF0=1, stop loading new data.
bra
_LBLH
movep X:M_DRXR,x0 ; Store 16-bit data in register
_LBLI
jset #2,X:M_DSR,_LBLJ ; Wait for SRRQ to go high (i.e. data ready)
jclr #3,X:M_DSR,_LBLI ; If HF0=1, stop loading new data.
bra
_LBLJ
movep X:M_DRXR,y0 ; Store 16-bit data in register
insert x1,x0,a ; concatenate next 16-bit word
insert y1,y0,a ; concatenate next 16-bit word
movem a0,p:(r0)+ ; Store 24-bit data in P mem.
movem a1,p:(r0)+ ; Store 24-bit data in P mem.
nop ; movem cannot be at LA.
_LOOP4 ; and go get another 24-bit word.
bra
;========================================================================
; This is the routine that loads from the Host Interface in PCI mode.
; MD:MC:MB:MA=x100 - Host PCI
PCIHOSTLD
bset #20,X:M_DCTR ; Configure HI32 as PCI
UB3_CONT
jclr #2,X:M_DSR,* ; Wait for SRRQ to go high (i.e. data ready)
movep X:M_DRXR,a0 ; Store number of words
jclr #2,X:M_DSR,* ; Wait for SRRQ to go high (i.e. data ready)
movep X:M_DRXR,r0 ; Store starting address
move r0,r1 ; save r0
do a0,_LOOP5 ; Load instruction words
_LBLK
jset #2,X:M_DSR,_LBLL ; Wait for SRRQ to go high (i.e. data ready)
jclr #3,X:M_DSR,_LBLK ; If HF0=1, stop loading data. Else check SRRQ.
bra
_LBLL
movep X:M_DRXR,P:(R0)+ ; Store 24-bit data in P mem.
nop ; movem cannot be at LA.
_LOOP5 ; and go get another 24-bit word.
; finish bootstrap