Motorola DSP56301 - Manual (Page 17)

Overview 1 -1
Chapter 1
Overview
This manual describes the DSP56301 24-bit digital signal processor (DSP), its memory,
operating modes, and peripheral modules. The DSP56301 is an implementation of the
DSP56300 core with a unique configuration of on-chip memory, cache, and peripherals.
Use this manual in conjunction with the DSP56300 Family Manual (DSP56300FM/AD),
which describes the CPU, core programming models, and instruction set details. DSP56301
Technical Data (DSP56301/D)—referred to as the data sheet—provides electrical
specifications, timing, pinout, and packaging descriptions of the DSP56301. You can obtain
these documents, as well as Motorola’s DSP development tools, through a local Motorola
Semiconductor Sales Office or authorized distributor. To receive the latest information on this
DSP, access the Motorola DSP home page at the address given on the back cover of this
document.
1.1 Manual Organization
This manual contains the following chapters and appendices:
n Chapter 1, Overview Features list and block diagram, related documentation,
organization of this manual, and the notational conventions used.
n Chapter 2, Signals/Connections DSP56301 signals and their functional groupings.
n Chapter 3, Memory Maps DSP56301 memory spaces, RAM configuration, memory
configuration bit settings, memory sizes, and memory locations.
n Chapter 4, Core Configuration Registers for configuring the DSP56300 core when
programming the DSP56301—in particular, the interrupt vector locations and the
operation of the interrupt priority registers; operating modes and how they affect the
processor’s program and data memories.
n Chapter 5, Programming the Peripherals Guidelines on initializing the DSP56301
peripherals, including mapping control registers, specifying a method of transferring
data, and configuring for General-Purpose Input/Output (GPIO).