Motorola DSP56301 - Manual (Page 13)

DSP56301 User’s Manual xiii
8-4 SCI Clock Control Register (SCCR).................................................................... 8-19
8-5 SCI Baud Rate Generator ..................................................................................... 8-20
8-6 16 x Serial Clock .................................................................................................. 8-21
8-7 SCI Programming Model—Data Registers .......................................................... 8-22
8-8 Port E Control Register (PCRE X:$FFFF9F)....................................................... 8-24
8-9 Port E Direction Register (PRRE X:$FFFF9E).................................................... 8-25
8-10 Port Data Registers (PDRE X:$FFFF9D) ............................................................ 8-25
9-1 Triple Timer Module Block Diagram..................................................................... 9-2
9-2 Timer Module Block Diagram ............................................................................... 9-3
9-3 Timer Mode (TRM = 1) ......................................................................................... 9-7
9-4 Timer Mode (TRM = 0) ......................................................................................... 9-7
9-5 Pulse Mode (TRM = 1) .......................................................................................... 9-8
9-6 Pulse Mode (TRM = 0) .......................................................................................... 9-9
9-7 Toggle Mode, TRM = 1 ....................................................................................... 9-10
9-8 Toggle Mode, TRM = 0 ....................................................................................... 9-11
9-9 Event Counter Mode, TRM = 1............................................................................ 9-12
9-10 Event Counter Mode, TRM = 0............................................................................ 9-13
9-11 Pulse Width Measurement Mode, TRM = 1 ........................................................ 9-15
9-12 Pulse Width Measurement Mode, TRM = 0 ........................................................ 9-15
9-13 Period Measurement Mode, TRM = 1.................................................................. 9-16
9-14 Period Measurement Mode, TRM = 0.................................................................. 9-17
9-15 Capture Measurement Mode, TRM = 0 ............................................................... 9-18
9-16 Pulse Width Modulation Toggle Mode, TRM = 1 ............................................... 9-20
9-17 Pulse Width Modulation Toggle Mode, TRM = 0 ............................................... 9-21
9-18 Watchdog Pulse Mode.......................................................................................... 9-23
9-19 Watchdog Toggle Mode ....................................................................................... 9-24
9-20 Timer Module Programmer’s Model.................................................................... 9-26
9-21 Timer Prescaler Load Register (TPLR)................................................................ 9-27
9-22 Timer Prescaler Count Register (TPCR).............................................................. 9-28
9-23 Timer Control/Status Register (TCSR) ................................................................ 9-28
B-1 Status Register (SR) .............................................................................................B-13
B-2 Operating Mode Register (OMR).........................................................................B-14
B-3 Interrupt Priority Register Core (IPRC) ...............................................................B-15
B-4 Interrupt Priority Register Peripherals (IPRP) .....................................................B-16
B-5 Phase-Locked Loop Control Register (PCTL) .....................................................B-17
B-6 Bus Control Register (BCR).................................................................................B-18
B-7 DRAM Control Register (DCR)...........................................................................B-19
B-8 Address Attribute Registers (AAR[3–0]).............................................................B-20