Motorola DSP56301 - Manual (Page 267)

Operating Modes
Triple Timer Module 9 -5
2. Configure the interrupt trigger:
a. Enable and prioritize overall peripheral interrupt functionality.
IPRP (TOL[1–0])
b. Enable a specific peripheral interrupt.
TCSR0 (TCIE)
c. Unmask interrupts at the global level.
SR (I[1–0])
d. Configure a peripheral interrupt-generating function.
TCSR0 (TC[7–4])
e. Enable peripheral and associated signals. TCSR0 (TE)
9.3 Operating Modes
Each timer has operating modes that meet a variety of system requirements, as follows:
n Timer
— GPIO, mode 0: Internal timer interrupt generated by the internal clock
— Pulse, mode 1: External timer pulse generated by the internal clock
— Toggle, mode 2: Output timing signal toggled by the internal clock
— Event counter, mode 3: Internal timer interrupt generated by an external clock
n Measurement
— Input width, mode 4: Input pulse width measurement
— Input period, mode 5: Input signal period measurement
— Capture, mode 6: Capture external signal
n PWM, mode 7: Pulse width modulation
n Watchdog
— Pulse, mode 9: Output pulse, internal clock
— Toggle, mode 10: Output toggle, internal clock
Note: To ensure proper operation, the TCSR TC[3–0] bits should be changed only when
the timer is disabled (that is, when TCSR[TE] is cleared).